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Electronics & Hardware
VLSI
A rigorous VLSI program covering the full chip-design flow. Learn Verilog, digital design, synthesis, and physical design used by leading semiconductor companies.
20 Weeks Intermediate to Advanced 4.8 rating
#Verilog#RTL#ASIC#FPGA
Curriculum
Download Brochure01Digital Electronics
02Verilog HDL
03RTL Design
04Synthesis & STA
05Physical Design
06Design Verification
6 real-world projects
Every project ships to your portfolio.
Project 1
ALU Design
RTL design and simulation of an ALU.
Project 2
FIFO Controller
Synchronous FIFO in Verilog.
Project 3
UART Module
Design and verify a UART block.
Project 4
FPGA Prototype
Deploy a design to an FPGA board.
Project 5
Timing Closure Study
Static timing analysis of a block.
Project 6
Capstone Chip Block
RTL-to-GDSII flow for a sub-system.
Learn from mentors who've done it
S
Suresh Iyer
VLSI Design Engineer
Taped out chips at leading semiconductor firms.
L
Lakshmi Rao
Verification Engineer
Specialist in RTL verification methodologies.